Tags	No category tags.
Version	0.3.0
License	Apache License 2.0
Build type	AMENT_CMAKE
Use	RECOMMENDED

Description	ROS 2 package examples demonstrating the use of hardware acceleration.
Checkout URI	https://github.com/ros-acceleration/acceleration_examples.git
VCS Type	git
VCS Version	main
Last Updated	2024-12-13
Dev Status	UNKNOWN
CI status	No Continuous Integration
Released	UNRELEASED
Tags	fpga gpu hardware-acceleration ros2
Contributing	Help Wanted (0) Good First Issues (0) Pull Requests to Review (0)

This example demonstrates how kernels can have memory mapped inputs along with stream interface from one kernel to another. Specifically, this is a ROS native version of a simple kernel to kernel streaming Vector Add and Vector Multiply C Kernel design with 2 memory mapped input to kernel 1, 1 Stream output from kernel 1 to input of kernel 2, 1 memory mapped input to kernel 2, and 1 memory mapped output that demonstrates on how to process a stream of data for computation between two kernels using XRT Native APIs. This design also illustrates how to set FIFO depth for AXIS connections i.e. for the stream connecting the two kernels. Package's inspired by https://github.com/Xilinx/Vitis_Accel_Examples/tree/master/host_xrt/streaming_k2k_mm_xrt.

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• Víctor Mayoral Vilches

• Víctor Mayoral Vilches